Timing Closure Explained
Timing closure is the process of making a design meet all its timing requirements across every condition it will face. It is less a single step and more a loop you run until both setup and hold are clean at every corner. Here is the shape of that loop, the way an engineer actually runs it.
It starts with constraints
Everything depends on the SDC. You define the clocks, their periods, input and output delays, false paths, and multicycle paths. If the constraints are wrong, the tool optimizes for the wrong target, so closure begins with getting the SDC right.
Analyze across corners and modes
A modern design is signed off across many combinations of process, voltage, and temperature, in different functional modes. This is MMMC, multi-mode multi-corner. A path can pass in one corner and fail in another, so closure means meeting timing in all of them, not just the typical case.
Close setup first, then hold
The usual order is setup first, at the slow corners, by speeding up the critical paths. Once setup is stable, you close hold at the fast corner by adding delay on the short paths. Hold is done after the clock tree is built, because before CTS the skew is not real.
| Stage | What you do | Typical fixes |
|---|---|---|
| Setup | Speed up slow paths | Resize cells, restructure logic, useful skew |
| Hold | Slow down fast paths | Insert buffers or delay cells |
| Signoff | Verify across all corners with SI | Targeted ECO on remaining violations |
ECO: the final touches
When only a handful of violations remain after the main optimization, you fix them with an ECO, an engineering change order, a small targeted edit to the netlist and layout that fixes those paths without disturbing everything else. Late closure is mostly ECO work.
When a path is a few picoseconds short, try a path-based analysis run before changing the design. Graph-based analysis is pessimistic, and PBA often recovers enough real margin to close the path with no edit at all.
A fix for one check can break the other. Adding delay cells for hold eats setup margin on the same path, and aggressive setup fixes can open hold. Always re-verify both checks, at every corner, after any change.
Key takeaways
- Closure is a loop, not a single step, run until clean at every corner
- It begins with correct SDC constraints
- Close setup first at slow corners, then hold at the fast corner after CTS
- Finish with targeted ECOs, and always re-check both checks after a fix