Retention Registers
When a power domain is switched off, all register state is lost. Retention registers have a small always-on "shadow latch" that preserves the register value thr
When a power domain is switched off, all register state is lost. Retention registers have a small always-on "shadow latch" that preserves the register value through power-off, then restores it when the domain powers back on.
Save / Restore Sequence — Power down: 1. Assert SAVE signal → shadow latch captures main FF value 2. Assert isolation → outputs clamped 3. Cut power switch → domain powers off (shadow latch on AON power) Power up: 1. Enable power switch → domain powers on 2. Assert RESTORE signal → main FF restores from shadow latch 3. Deassert isolation → normal operation resumes
Retention Register Tradeoffs — Area cost: ~2–3× larger than regular FF Leakage: Shadow latch draws small AON leakage Not all registers need retention - only state that's expensive to reconstruct (cache tags, config registers). Data that can be reloaded from memory doesn't need retention. UPF command: set_retention PD_CPU -save_signal {save 1} -restore_signal {restore 1}