Module 82 min

PV Tool Knowledge

Calibre from Siemens EDA (formerly Mentor Graphics) is the industry-standard sign-off verification tool. Virtually all foundry PDKs are certified for Calibre. I

Calibre (Siemens)

Calibre from Siemens EDA (formerly Mentor Graphics) is the industry-standard sign-off verification tool. Virtually all foundry PDKs are certified for Calibre. If your Calibre DRC is clean, the foundry accepts your GDS.

Calibre ModeCommandPurpose
DRCcalibre -drc -hier -runset drc.svrfDesign rule verification against foundry rules
LVScalibre -lvs -hier -runset lvs.svrfLayout vs schematic comparison
PEX/RCXcalibre -xrc -rcx -runset rcx.svrfParasitic RC extraction → generates SPEF
Fillcalibre -drc -hier -runset fill.svrfInsert dummy metal fill to meet density rules
ERCcalibre -erc -runset erc.svrfElectrical connectivity and latchup checks
PERCcalibre -perc -runset perc.svrfESD and latchup reliability analysis
DFMcalibre -dfm -runset dfm.svrfDesign-for-manufacturing: yield improvement checks
Litho CheckcalibreLitho -verifyOptical proximity correction / lithography simulation
Pro Tip

Calibre Interactive (RVE) — The Results Viewing Environment (RVE) is Calibre's GUI for viewing DRC/LVS errors. Open it with calibredrv -m gds -gui. Features: highlight errors in layout, zoom to violation, batch-fix mode, error count by rule, and cross-probe to schematic for LVS.

IC Validator (Synopsys)

Synopsys IC Validator (ICV) is Synopsys's native sign-off verification tool, tightly integrated with StarRC (parasitic extraction) and ICC2. Growing adoption especially in designs using the full Synopsys tool chain.

ICV ModeCommandPurpose
DRCicv -drc -i chip.gds -c icv_drc.rsDesign rule verification
LVSicv -lvs -i chip.gds -s netlist.vLayout vs schematic
Fillicv -fill -i chip.gds -c fill.rsDensity fill insertion
ERCicv -erc -i chip.gdsElectrical rule check
In-design DRCicc2_shell> check_drcDRC inside ICC2 during routing - catch violations early

Comparison

FeatureCalibre (Siemens)ICV (Synopsys)
Foundry CertificationGold Standard - all foundriesCertified at major foundries
Tape-out AcceptanceUniversally acceptedTSMC, Samsung, GF certified
PD IntegrationIn-design: Innovus + ICC2Native in ICC2
Parasitic ExtractionCalibre xRC/PEXStarRC (separate tool)
GUI ViewerCalibre RVECustom Error Browser
Speed (large designs)Excellent (hierarchical)Excellent (hierarchical)
Rule Deck LanguageSVRF / TVFRSDB / SVRF compatible