The ECO Flow
Making small, surgical late-stage changes
Designs are never perfect on the first pass. Late in the flow you fix the last problems with an ECO, an Engineering Change Order: a small, targeted change that fixes what is broken without disturbing the rest of a nearly-finished design.
Two kinds of ECO
- Functional ECO: the logic itself must change, for example a bug found late or a spec change. The netlist is edited.
- Timing ECO: the logic is correct but a few paths still violate. You resize cells, add buffers, or adjust to close those paths.
Why surgical matters
By ECO time the design is placed, routed, and almost signed off. Re-running the whole flow would disturb everything and could create new violations. So an ECO changes only the few cells and nets involved and runs incremental placement and routing on just that area, leaving the rest untouched.
Pre-mask versus post-mask
Timing matters here. A pre-mask ECO, before the masks are made, can change anything. A post-mask ECO, after some masks already exist, must be a metal-only ECO: it can only rewire using existing spare cells and the metal layers, because changing the base layers would mean remaking expensive masks.
| ECO type | Can change | Cost |
|---|---|---|
| Pre-mask | Any layer, add cells freely | Lower (no masks made yet) |
| Post-mask (metal-only) | Metal layers + spare cells only | Higher, but cheaper than full respin |
Spare cells
Designers scatter unused spare cells (and fill that can be turned into gates) across the chip in advance, precisely so that a post-mask ECO can implement a small logic fix by rewiring to those spares using only metal. It is insurance built into the floorplan.
The ECO fixing commands
A timing ECO is usually generated in the signoff STA tool (PrimeTime) and then handed to the place-and-route tool to implement incrementally. Signoff timing decides exactly which cells to resize and where to add buffers, because it sees the real parasitics and margins; the physical tool then makes those edits and reroutes only the touched nets. Three commands split the work by intent.
- fix_eco_timing repairs setup and hold. It resizes cells, inserts or removes buffers, and can be pointed at the clock network, the sequential cells, or the combinational cells as you direct it.
- fix_eco_drc repairs design-rule violations: max transition, max capacitance, and noise. It sizes cells or inserts buffers (or inverter pairs) to fix a slew or a load that is out of spec.
- fix_eco_power recovers power once timing is met, mainly by swapping cells to a higher-threshold, lower-leakage variant wherever there is slack, or by removing buffers that are no longer needed.
Each command takes a list of fixing methods, and the method decides how the change is made. Choosing the right one matters: removing a buffer helps setup without adding hold risk, while an inverter pair keeps the polarity correct inside a clock network.
| Method | What it does | Typical use |
|---|---|---|
| size_cell | Swap a cell for a logically identical one with different drive strength | The default setup and DRC fix |
| insert_buffer | Add buffers along the path, or only at the load or driver pins | Long nets, heavy loads, hold padding |
| insert_inverter_pair | Add inverter pairs instead of buffers, keeping polarity | Fixes inside a clock network |
| bypass_buffer | Route around existing buffers or inverter pairs in the clock | Reducing clock latency in an ECO |
| remove_buffer | Delete buffers to speed a path up | A setup fix that does not worsen hold or DRC |
fix with a margin, not to zero. Options like -setup_margin and -hold_margin leave headroom so the change survives re-analysis, and -slack_lesser_than restricts the tool to the endpoints that actually violate, so you make the fewest edits. Dedicated signoff ECO tools go further and work only on the critical part of the design, the ECO domain, which is what gives them a fast turnaround on a nearly finished chip.
the one-line summary: an ECO is a minimal change plus incremental place-and-route, and a post-mask ECO is metal-only using spare cells. Knowing why spare cells exist, to enable cheap late fixes without remaking masks, is a classic senior-level interview point.
always re-verify after an ECO: re-run timing on the affected paths and check you did not create new violations or DRC problems nearby. A careless ECO that fixes one path and breaks two is worse than the original problem.