Module 71 min

Physical Verification

Verifies the layout satisfies all foundry manufacturing rules (spacing, width, enclosure, density). Zero DRC violations required for tape-out. Tool: Calibre DRC

DRC - Design Rule Check

Verifies the layout satisfies all foundry manufacturing rules (spacing, width, enclosure, density). Zero DRC violations required for tape-out. Tool: Calibre DRC, Mentor.

LVS - Layout vs Schematic

Compares extracted netlist from layout with the reference schematic. Verifies all connections are correct and no opens/shorts were introduced during PD. Tool: Calibre LVS.

ERC - Electrical Rule Check

Checks for floating nodes, unconnected power/ground, improper biasing, ESD violations, latchup risk areas. Ensures circuit will function correctly electrically.

Common DRC Violation Examples

SPACING VIOLATION

ERC - Electrical Rule Check — click to enlarge

WIDTH VIOLATION

Click to enlarge