Module 46 min

Cadence Genus

The Genus flow as explicit generic to mapped to optimized stages, its common UI with Innovus, and iSpatial physical synthesis.

Cadence Genus is the synthesis engine in the Cadence digital flow, paired downstream with the Innovus place-and-route tool. It exposes the synthesis stages explicitly, generic, mapped, then optimised, and shares a common command interface (Stylus) with Innovus, so constraints and scripts carry across the front-to-back flow. Its physical-synthesis mode, iSpatial, brings Innovus placement and optimisation engines into synthesis for tighter layout correlation.

The Genus flow

1
Read libraries

read_libs for the .lib timing libraries (and physical/LEF data for physical synthesis).

2
Read and elaborate

read_hdl to load the RTL, then elaborate the top module into a generic netlist.

3
Constrain

read_sdc to apply clocks, I/O delays and exceptions.

4
Synthesize in stages

syn_generic (technology-independent) -> syn_map (map to cells) -> syn_opt (incremental optimisation).

5
Report and write out

report_timing / report_area / report_power, then write_hdl and write_sdc for Innovus.

tcl
read_libs sky130_tt.lib
read_hdl rtl/*.v
elaborate top
read_sdc constraints.sdc
syn_generic
syn_map
syn_opt
report_timing > rpt/timing.rpt
write_hdl > netlist/top.v
write_sdc  > netlist/top.sdc

Genus concepts worth knowing

  • Explicit stages: generic (GTECH) -> mapped (library cells) -> optimized, so you can report and debug between each.
  • iSpatial physical synthesis: uses the Innovus placement/optimisation engines during synthesis for accurate physical timing.
  • Common UI with Innovus (Stylus): the same constraint and command style flows from synthesis into place-and-route.
  • Effort levels on syn_map / syn_opt trade runtime against QoR, much like DC’s effort settings.
CommandPurpose
read_libsLoad the technology (and physical) libraries
read_hdl / elaborateRead RTL and build the design
read_sdcApply timing constraints
syn_generic / syn_map / syn_optGeneric -> mapped -> optimised synthesis stages
report_timing / report_area / report_powerCheck QoR
write_hdl / write_sdcEmit the netlist and constraints for Innovus
Note

In short, Genus runs synthesis as explicit generic -> mapped -> optimised stages, shares a common interface with Innovus, and can pull in real placement (iSpatial) for physically-accurate timing.