Module 41 min
Cadence Genus
Genus is Cadence's modern synthesis solution featuring concurrent optimization and a unified data model with Innovus for seamless handoff.
Genus is Cadence's modern synthesis solution featuring concurrent optimization and a unified data model with Innovus for seamless handoff.
Key Genus Commands
| Command | Purpose |
|---|---|
| read_hdl -language sv | Read SystemVerilog/Verilog/VHDL sources |
| elaborate | Elaborate and link design hierarchy |
| read_mmmc | Read multi-mode multi-corner view definition |
| syn_generic | Generic synthesis (technology-independent) |
| syn_map | Technology mapping to library cells |
| syn_opt | Incremental optimization (timing/area) |
| report timing | Report worst timing paths |
| report area | Report cell count and area |
| report power | Dynamic and leakage power |
| write_hdl | Write gate-level netlist |
| write_sdc | Write timing constraints |
DC vs Genus Comparison
| Feature | Synopsys DC | Cadence Genus |
|---|---|---|
| Vendor | Synopsys | Cadence |
| Script Language | TCL (dc_shell) | TCL / Innovus-compatible |
| Compile Command | compile_ultra | syn_opt |
| MMMC Support | Via scenario objects | Native via read_mmmc |
| PD Integration | ICC2 (write_icc2) | Innovus (write_db) |
| Physical Guidance | DC Topological | Physical Guidance Mode |
| Industry Usage | Dominant | Growing |